The use of multiple layer printed circuit boards, (hereinafter “PCBs”), in electronic devices has become wide spread throughout many industries. As devices and their electrical components become ever smaller, the density of the components and their connecting leads on the layers of the PCBs has increased. In addition, the use of more layers has been necessary to appropriately connect the additional components.
Multiple layer PCBs are made one layer at a time and then sandwiched together. Usually, the layers are in registration with respect to each other within designated manufacturing tolerances. During manufacturing, however, there is opportunity for each layer to experience growth, shrinkage or warping due to material properties affected by the manufacturing processes. In addition, alignment tolerances and other quality control issues may affect the stacking and alignment of the layers. As a result, layer-to-layer misalignment may occur between two or more layers within the multiple layer PCB.
Connections between the layers are necessary and are usually provided by holes drilled through one or more layers and plated to supply the electrical connection. When the layers of a PCB are not aligned correctly, the plated connection holes, also known as vias, may not line up with corresponding sites on another layer. When the layer-to-layer registration is off by a large margin, the via may not connect to the intended site at all. During subsequent electrical testing of the PCB, the misregistration will be discovered based on an electrical conduction failure of the via. Catching faulty PCBs at this stage of the manufacturing process is relatively easy and less costly to correct.
When the layer-to-layer registration is off by a smaller margin, the via may have a slight electrical connection and, thus, pass the electrical testing. When this PCB subsequently undergoes further manufacturing or assembly processes, the inadequate electrical connection may then cause a failure in the board. Failure at this stage of manufacturing or assembly is more costly, due to the added time and labor input into the formation of the PCB.
In some situations, the misregistration of the layers may cause a misalignment situation wherein there is enough electrical connection provided to pass both electrical testing of the board and subsequent manufacturing and/or assembly processes. However, the inadequacy of the electrical connection has the potential for causing reliability problems, such as early failure of the PCB during its intended use. These types of failures can be extremely costly and potentially dangerous and, thus, should be avoided by being detected during the formation process.
Implantable medical devices, such as cardiac rhythm management devices (e.g., pacing systems and defibrillators) and a variety of implantable muscle or nerve stimulators, conventionally include a battery-powered electronic pulse generator coupled to an electronic circuit assembly contained within a sealed metal housing. The electronic circuit assembly typically comprises a plurality of interconnected PCBs that function to control the operation of the implantable device.
A significant concern for manufacturers of implantable electronic devices is ensuring an adequate level of quality control and reliability in the electronic circuit assembly, and in particular in the circuit boards. Therefore, the ability to quickly and easily verify the quality of each PCB is important. The ability to detect misregistration of layers at the PCB formation stage would improve both the quality and reliability of the PCBs, as well as decrease manufacturing costs.